James V. Barnett II

Virtex family

The Virtex series of FPGAs have integrated features that include FIFO and ECC logic, DSP blocks, PCI-Express controllers, Ethernet MAC blocks, and high-speed transceivers. In addition to FPGA logic, the Virtex series includes embedded fixed function hardware for commonly used functions such as multipliers, memories, serial transceivers and microprocessor cores. These capabilities are used in applications such as wired and wireless infrastructure equipment, advanced medical equipment, test and measurement, and defense systems.

The Virtex 7 family, is based on a 28 nm design and is reported to deliver a two-fold system performance improvement at 50 percent lower power compared to previous generation Virtex-6 devices. In addition, Virtex-7 doubles the memory bandwidth compared to previous generation Virtex FPGAs with 1866 Mbit/s memory interfacing performance and over two million logic cells.

In 2011, Xilinx began shipping sample quantities of the Virtex-7 2000T "3D FPGA", which combines four smaller FPGAs into a single package by placing them on a special silicon interconnection pad (called an interposer) to deliver 6.8 billion transistors in a single large chip. The interposer provides 10,000 data pathways between the individual FPGAs — roughly 10 to 100 times more than would usually be available on a board – to create a single FPGA. In 2012, using the same 3D technology, Xilinx introduced initial shipments of their Virtex-7 H580T FPGA, a heterogeneous device, so called because it comprises two FPGA dies and one 8-channel 28 Gbit/s transceiver die in the same package.

The Virtex-6 family is built on a 40 nm process for compute-intensive electronic systems, and the company claims it consumes 15 percent less power and has 15 percent improved performance over competing 40 nm FPGAs.

The Virtex-5 LX and the LXT are intended for logic-intensive applications, and the Virtex-5 SXT is for DSP applications. With the Virtex-5, Xilinx changed the logic fabric from four-input LUTs to six-input LUTs. With the increasing complexity of combinational logic functions required by SoC designs, the percentage of combinational paths requiring multiple four-input LUTs had become a performance and routing bottleneck. The six-input LUT represented a tradeoff between better handling of increasingly complex combinational functions, at the expense of a reduction in the absolute number of LUTs per device. The Virtex-5 series is a 65 nm design fabricated in 1.0V, triple-oxide process technology.

Legacy Virtex devices (Virtex, Virtex-II, Virtex-II Pro, Virtex 4) are still available, but are not recommended for use in new designs.

Kintex

The Kintex-7 family is the first Xilinx mid-range FPGA family that the company claims delivers Virtex-6 family performance at less than half the price while consuming 50 percent less power. The Kintex family includes high-performance 12.5 Gbit/s or lower-cost optimized 6.5 Gbit/s serial connectivity, memory, and logic performance required for applications such as high volume 10G optical wired communication equipment, and provides a balance of signal processing performance, power consumption and cost to support the deployment of Long Term Evolution (LTE) wireless networks.

In August 2018, SK Telecom deployed Xilinx Kintex UltraScale FPGAs as their artificial intelligence accelerators at their data centers in South Korea. The FPGAs run SKT's automatic speech-recognition application to accelerate Nugu, SKT's voice-activated assistant.

In July 2020 Xilinx made the latest addition to their Kintex family, 'KU19P FPGA' which delivers more logic fabric and embedded memory

Artix

The Artix-7 family delivers 50 percent lower power and 35 percent lower cost compared to the Spartan-6 family and is based on the unified Virtex-series architecture. The Artix family is designed to address the small form factor and low-power performance requirements of battery-powered portable ultrasound equipment, commercial digital camera lens control, and military avionics and communications equipment. With the introduction of the Spartan-7 family in 2017, which lack high-bandwidth transceivers, the Artix-7's was clarified as being the "transceiver optimized" member.

Zynq

The Zynq-7000 family of SoCs addresses high-end embedded-system applications, such as video surveillance, automotive-driver assistance, next-generation wireless, and factory automation. Zynq-7000 integrate a complete ARM Cortex-A9 MPCore-processor-based 28 nm system. The Zynq architecture differs from previous marriages of programmable logic and embedded processors by moving from an FPGA-centric platform to a processor-centric model. For software developers, Zynq-7000 appear the same as a standard, fully featured ARM processor-based system-on-chip (SoC), booting immediately at power-up and capable of running a variety of operating systems independently of the programmable logic. In 2013, Xilinx introduced the Zynq-7100, which integrates digital signal processing (DSP) to meet emerging programmable systems integration requirements of wireless, broadcast, medical and military applications.

The new Zynq-7000 product family posed a key challenge for system designers, because Xilinx ISE design software had not been developed to handle the capacity and complexity of designing with an FPGA with an ARM core. Xilinx's new Vivado Design Suite addressed this issue, because the software was developed for higher capacity FPGAs, and it included high level synthesis (HLS) functionality that allows engineers to compile the co-processors from a C-based description.

The AXIOM, the world's first digital cinema camera that is open source hardware, contains a Zynq-7000.

Spartan family

The Spartan series targets low cost, high-volume applications with a low-power footprint e.g. displays, set-top boxes, wireless routers and other applications.

The Spartan-6 family is built on a 45 nm, 9-metal layer, dual-oxide process technology. The Spartan-6 was marketed in 2009 as a low-cost option for automotive, wireless communications, flat-panel display and video surveillance applications.

The Spartan-7 family, built on the same 28nm process used in the other 7-Series FPGAs, was announced in 2015, and became available in 2017. Unlike the Artix-7 family and the "LXT" members of the Spartan-6 family, the Spartan-7 FPGAs lack high-bandwidth transceivers.

EasyPath

Because EasyPath devices are identical to the FPGAs that customers are already using the parts can be produced faster and more reliably from the time they are ordered compared to similar competing programs.

Versal

Versal is Xilinx's 7 nm architecture that targets heterogeneous computing needs in datacenter acceleration applications, in artificial intelligence acceleration at the edge, Internet of things (IoT) applications and embedded computing.

The Everest program focuses on the Versal Adaptive Compute Acceleration Platform (ACAP), a product category combining a traditional FPGA fabric with an ARM system on chip and a set of coprocessors, connected through a network on a chip. Xilinx's goal was to reduce the barriers to adoption of FPGAs for accelerated compute-intensive datacenter workloads. They are designed for a wide range of applications in the fields of big data and machine learning, including video transcoding, database querying, data compression, search, AI inferencing, machine vision, computer vision, autonomous vehicles, genomics, computational storage and network acceleration.

On April 15, 2020, it was announced that Xilinx would supply its Versal chips to Samsung Electronics for 5G networking equipment. In July 2021, Xilinx debuted the Versal HBM, which combines the network interface of the platform with HBM2e memory to alleviate data bottlenecking.